1. Field of the Invention
The present invention relates generally to a system and method for directly modulating a voltage controlled oscillator for use in a frequency/phase modulated system, more particularly by applying the modulation directly on the voltage controlled oscillator (VCO), calibrating the frequency deviation by changing the reference frequency to precisely the same deviation and noting the delta lock voltage. The modulation is scaled to this calibrated voltage.
2. Prior Art
Communications over RF channels requires a means to get the transmission data to RF and back. This process of imposing the transmission data onto a suitable waveform is accomplished by modulation, wherein some characteristic of a carrier wave is varied in accordance with an information signal, or modulating wave. The modulated signal can then be transmitted over a channel, and the original information-bearing signal is recovered through a process of demodulation upon reception.
One of the most effective carrier frequency generation circuits is the phase locked loop (PLL). FIG. 1 depicts a basic form of the prior art phase locked loop (PLL), consisting of, a phase frequency detector (PFD) 101, a loop filter 102, a VCO 103, and a digital divider (N) 104. A reference frequency is input to the PFD. When the loop is in lock, the output frequency (of) is equal to N*fref. The value of the digital divider can be changed to alter the output frequency. If for instance fref=1 Mhz and N=2400, then fo=2400 Mhz. Thus if N is changed to 2401, then fo=2401 Mhz. It is in this way that a PLL can be used to synthesize precise frequencies which are multiples of the reference frequency (fref). When the value of N is changed the output frequency will change until the loop reaches a steady state, at which time it will lock. The time the loop takes to lock to the new output frequency is determined by the loop filter 102.
One of the uses of a PLL is for a precise frequency reference. Another frequently used application for a PLL is in angular (FM, PM) modulation. A PLL can be angle modulated in several different ways:
1. Changing N 104 periodically to achieve output frequency/phase shifts.
2. Modulating the reference frequency.
3. Injecting the modulation at the PFD 101.
4. Injecting the modulation at the VCO input,
The first three modulation methods are used to achieve low frequency modulation, ie., within the loop bandwidth. This is due to the loop filter rejecting any high frequency content. For instance, if we change N 104 at a very fast rate compared to the loop bandwidth, the loop will not react at all since the filter 102 will not allow any high frequency signal to pass through and reach the VCO 103. Of the first three methods, the first is the most accurate since the number N is digital. A common prior art method is to use delta sigma modulation for changing N as described in xe2x80x9cA Multiple Modulator Fractional Dividerxe2x80x9d 1990 by Miller and Conley, 44th Annual Symposium on Frequency Control. It is also possible to introduce controlled phase shifts in the divider loop so as to cause phase modulation.
The last method (four) is used for high frequency modulation. The exact opposite effect mentioned in the previous paragraph happens here. Any low frequency content in the modulation waveform will be corrected by the loop and the output frequency will not change. However, high frequency content will not be affected by the loop filter 102. This method of high frequency modulation is known to be very inaccurate since the VCO control voltage""s sensitivity changes with VCO center frequency, process variations and temperature variations. Another complication exists in injecting signals into the VCO. In a typical communication system, the frequency deviation required for modulation is a very small percentage of its center frequency. For instance, if a VCO can tune between 2400 Mhz and 2500 Mhz for a tune voltage of 0.5V to 2.5V, then the sensitivity is (2500xe2x88x922400)/(2.5xe2x88x920.5)=50 Mhz/V. A typical deviation required is on the order of 150 kHz. Therefore, a very small and precise voltage is needed to achieve this modulation deviation (150 kHz/50 Mhz in this case is approximately 3 mV).
The prior art way to overcome this problem is to use two different input ports for the VCO (FIG. 2). One of them is the main port 201, which is connected to the loop, and therefore has a large sensitivity. The other is a modulation port 202 with small (on the order of frequency deviation) sensitivity.
To achieve a wide band modulation, it is required to modulate low frequencies as well as high frequencies. From the above mentioned methods, modulation can be applied at two places to achieve wide band modulation. For instance, low-frequency modulation can be used to vary the divider N 104, and high frequency modulation can be injected into the VCO 103. This known in the industry as two-point modulation as set forth in xe2x80x9cFM Modulation of Frequency Synthesizersxe2x80x9d, by Scott, R. I. H. and Underhill, M. J., IERE Conference on Land Mobile Radio Lancaster (UK) September 1979. The difficulty in this method is in matching the low frequency and the high frequency response characteristics.
A digital modulation method for which the above may be useful is FSK (frequency shift keying). In this method, two discrete frequencies are transmitted to represent logic xe2x80x9c1xe2x80x9d and logic xe2x80x9c0xe2x80x9d. For example, an FSK signal could have a center frequency of 2400 Mhz and represent a 1 as 2400.150 Mhz and represent a 0 as 2399.850 Mhz. In order to change the transmitted data value from a 1 to 0 the frequency must shift from 2400.150 Mhz to 2399.850 Mhz. The transmitted spectrum occupies a wider bandwidth because of the abrupt changes in data. This problem can be overcome by utilizing Gaussauian frequency shift keying (GFSK), in which the abrupt change from one carrier frequency, to another is made more gradual by introducing a filter into the system. This filter causes the frequency shifts to become more gradual thereby lessening the effect of widening the spectrum. Even with GFSK, the bandwidth for high data rate systems contains both low as well as high frequencies.
Bluetooth is a communication standard that uses the GFSK technique. Bluetooth is a relatively new communication standard for short range communications devices that will be used to link devices such as personnel computers, PDA""s, wireless phones and GPS receivers. The Bluetooth standard specifies an operating frequency of 2400 to 2480 Mhz in steps of 1 Mhz with modulation deviations of 140 to 175 kHz. Because a Bluetooth device is meant to be used at relatively short ranges, up to ten meters, it is designed so that it will not interfere with other Bluetooth devices that are within its operating range. In order to minimize the likelihood that any two Bluetooth devices in the same area will be on the same frequency at the same time, the Bluetooth standard incorporates the use of a technique called spread-spectrum frequency hopping. In this technique, a device will use 79 individual randomly chosen frequencies within a designated range, changing from one to another on a regular basis. In the case of Bluetooth, the transmitters change frequencies 1,600 times every second between the 79 RF channels. Each channel is divided into time slots 625 microseconds long.
Since every Bluetooth transmitter uses spread-spectrum transmitting automatically, it""s unlikely that two transmitters will be on the same frequency at the same time. This same technique minimizes the risk that portable phones or baby monitors will disrupt Bluetooth devices since any interference on a particular frequency will last only a tiny fraction of a second. While the Bluetooth standard provides for a very loose range of deviations for frequency shifts, the hops must be precisely controlled.
The Bluetooth standard for data transmission specifies a data rate of one mega bit per second (Mbs). Data, (a one or a zero) is transmitted using the FSK technique, this means that a logical one is represented by a frequency and a logical zero is represented by a different frequency. For example, if the center frequency is 2400, and a logical one is represented as 2400 Mhz+150 kHz or 2400.150 Mhz then a logical zero would be represented as 2399.850 Mhz. When the data changes from one logical value to the other the frequency must shift from one value to the other. The Bluetooth standard specifies a data rate of one data bit per micro second, therefore if the data changes each bit, as in the case of a succession of alternate ones and zeros, then the data rate frequency is at a maximum. If conversely, the data is stable, either a one or a zero, then the data rate frequency is at a.minimum. The maximum data rate frequency being 500,000 shifts per second or 500 kHz, and the minimum data rate frequency being 0, or no frequency shifts.
Thus, the modulation data consists of a wide band of frequencies, covering 0 to 500 kHz. To achieve this modulation, a two-point modulation scheme is ideal. As previously mentioned, low-frequency modulation by varying the divider N 104 is precise. However, high frequency modulation by varying the VCO input voltage is not precise. There exists a need to calibrate the high frequency modulation input so that a precise deviation is realized. The present invention solves this calibration problem.
Therefore it is an object of the present invention to provide a system and method to control a PLL to precisely modulate the output frequency over a wide range of frequencies such as are used in a Bluetooth by setting the reference frequency to a predetermined frequency deviation, noting the lock voltage applied to change the output frequency and storing in memory the lock voltage for each output frequency. Thus scaling the modulation to the calibrated voltage.
Accordingly, a method for generating a plurality of frequencies having predetermined frequency deviations from a phase lock loop device including a VCO having a main voltage input, a modulation voltage input and a frequency output, a first and second feedback loop digital divider, each having an input and an output, a phase frequency detector having a first and second input and an output, a reference frequency generator such as a crystal oscillator having an output, a first and second reference frequency digital divider, each having an input and an output, a loop filter having an input and an output, a switch having an input and a first and a second switched output, a hold circuit having an input and an output, a memory circuit for storing the a lock voltage and the corresponding loop output frequency, the steps including; setting a first initial predetermined value of the first feedback loop digital divider, connecting a switch output to the main input of the VCO, supplying a first predetermined reference frequency to the phase frequency divider, supplying a loop correction voltage Vr, to a main drive input of a VCO, allowing the phase lock loop to lock, switching the switch output to the modulation input of the VCO, changing the initial predetermined value of the first feedback loop digital divider, supplying a second loop correction voltage Vj, allowing the phase lock loop to lock, storing the new lock voltage in a memory circuit.